Diagnosis of the logic element DC LUT FPGA

Abstract

Diagnosis of the logic element DC LUT FPGA

S. F. Tyurin, A. Yu. Gorodilov, E. Yu. Danilova

Incoming article date: 21.03.2014

In this paper a modification of logic element DC LUT FPGA is proposed for the purpose of the acceleration of diagnostics. Simulation of proposed modification was performed in the system NI Multisim 10 by National Instruments Electronics Workbench Group. Evaluation of hardware costs is also given.

Keywords: logic element, DC LUT, FPGA, diagnosis, reliability